interrupts
priorities are fixed and defined by the arrangement of modules
3 types
	system reset
	non-maskable (NMI)
	maskable

INTE for enabling interrupts
others for disabling
several different types of interrupts
listed in manual: watchdog, oscillator, nmi, access violations for flash mem, uart
need to use IFG regs, addresses 2 and 3, 8 bit regs (different bits for different things)
lots of good info in manual

flow:
currently executing instruction is completed
pc is pushed on to stack
sr pushed on to stack
interrupt with highest priority is selected if multiple interrupts occurredduring the last inst and are pending for service
int req flag resets auto on single source flags, multi source flags remain set for servicing by software
sr is cleared with exception of SCG0, which is left unchanged, terminates any low power mode, b/c GIE bit is cleared, further interrupts disabled
content of interrupt vector is loaded into PC, program continues with ISR at the address
takes 6 cycles to execute
main program should be unaffected

use RETI to return from ISR
the SR with all previous settings pops from the stack
PC pops from stack and begins execution at point where it was interrupted
takes 5 cycles to return

operating modes:
active
LPM:
0 cpu,mclk disabled
1 cpu, mclk, DCO disabled, possibly DC generator
2 cpu, mclk, smclk, dco disabled, DC generator enabled
3 cpu, mclk, smclk, dco, dc generator disabled
4 cpu and all clocks disabled

lots of detailed information that I probably can't use
GIVE ME C CODE TO USE CLOCKS AND INTERRUPTS
DO IT
here we go:
BCSCTL1 |= XTS|DIVA0|DIVA1;
do {
	IFG1 &= ~OFIFG;
	for(int i = 0xff;i>0;i--);
} while (IFG1&OFIFG);
// clock is stable
BCSCTL2 |= SEIM_3;

watchdog timer is 16bit counter