5/29/07 H. H. Huie Vrms = Vmax/sqrt(2) Voltage gain (Av): Vo/Vi = 20*log|Av| Current gain (Ai): Io/Ii = 20*log|Ai| Voltage gain (Ap): Po/Pi = 10*log|Ap| frequency response - time between -3dB and -3dB, see fig 1.1 source representation: independent sources have circles, dependent sources are diamonds voltage sources have +/-, amperage sources have an arrow indicating direction of current flow (which is opposite of electron flow) when amplifying a signal, the slope of the amplification graph is the gain. clipping occurs when an incoming signal is outside of the max or min amplification range, see fig 1.2 dc bias point: point forward of 0V which is the baseline of amplification (aka quiescent operating point), see fig 1.3 if source impedance == load impedance, greatest power transfer/delivery characteristics of an ideal amplifier: input impedance is +inf, output impedance is 0, amplification factor is +inf fig 2.2 is high, low, band pass amps 5/31/07 a decade is a shift by a factor of 10 as used in logarithmic scales: 1,10,100,1000, etc where the numbers listed are always an equal distance apart offset voltage: ideal opamp has no output for no input, but real opamps can amplify noise to saturation slew rate: how fast from 0 to saturated value freq response: freq response from 0-+inf common mode rejection ratio: v2-v1/(v1/2+v2/2) closer second part is to 0, better the opamp remember inverting and non-inverting configs for opamps, inverting has gnd on +, both have resistors on - fig 2.1 can be solved by either superposition, by nodal analysis, or by common sense (i used common sense and then nodal) Diodes! chunk of silicon w/ one side p-type and the other n-type anode attached to p-type and cathode to n-type current flows from anode to cathode only minimal current other direction called reverse biased if voltage is applied in wrong direction forward biased if voltage applied in right direction will only pass the positive parts of a sinusoidal waveform or gate implemented with diodes and resistor in fig 2.4, only the highest input voltage is output, no adding and gate implemented with diodes and resistor in fig 2.5, only lowest input voltage is output, no adding or subtracting second approximation of a diode is an ideal diode with a battery connected in series on the cathode side that reverse biases the diode slightly there is a voltage at which the diode will break down: called breakdown voltage, supposed to be recoverable but only if it doesnt burn out breakdown voltage is always on the negative bias after passing the breakdown voltage, a diode will pass current in the reverse biased direction guidelines say have the breakdown voltage be twice the maximum voltage used in the circuit third approximation of a diode is an ideal diode with a battery and a resistor on the cathode side voltage vs current graph is now sloped with a small curve near the origin approximation depends on voltage applied and application lower voltages tend to need either approx 2 or 3 silicon is alwyas 0.7V and germanium is always 0.3V i = Is*(e^(V/n*Vt)-1) Vt = thermal voltage = kT/q k = boltzmann's constant T = temp Is = saturation current(proportional to crosssectional area of diode) n = see page 150 Vt = 25mV@room temp 06/05/07 Ri for a standard inverting amp is equal to R1 diode approx 1: ideal diode only diode approx 2: 1+small voltage source (0.7V for Si, 0.3V for Ge) diode approx 1: 2+resistor zener diodes: breakdown side is important only permits a certain voltage to pass can be used as a shunt regulator realistic model can be obtained by using a resistor(very small impedance) in series with the zener diode changes due to load changes and input voltage changes line regulation defined as deltaVo/deltaVi = Rz/R+Rz = mV/V load regulation defined as deltaVo/deltaIl = -(Rz//R) = mV/mA rectifiers 1/2 wave rectifier - can be implemented with a single diode PIV - peak inverse voltage - Vp for first approx Vp - 0.7V for second and third approx center tap full wave rectifier ripple freq is 2*input freq diode current = Idc/2 PIV = 2*Vp bridge rectifier ripple freq is 2*input freq diode drop = 1.4V diode current = Idc/2 PIV = Vp - 0.7 06/07/07 ch3 hw notes 7.5V zener diode regulator Izmin == twice knee current == 2*Izk Ilmax == 10mA Ripple voltage: diff between min and max voltages when a cap is put in parallel with a rectifier proof on page 38 Vr ~= Vp*T/CR T = period to keep ripple to a min, make cap huge Vdc avg = Vp - Vr/2 Design a 10V pwr supply w/ 1V ripple Ilmax = 25mA Vo = 10.5V second approx of diodes use a zener diode to regulate hw3.90 is supposed to be complicated cause it has a center tap xformer positive and negative voltage supply from a single transformer Limiters and clamps: clipping circuit cuts chunks off either below or above a given voltage with the rest of the signal being at the given voltage clamping circuit shifts a signal into a voltage range, or up or down a certain voltage voltage multipliers do just that other diodes: schottky diodes viractor/varicap photodiode LED 06/12/07: lots of review in notebook CH5: Transistors 2 types: npn - Ie = Ib + Ic (most popular) pnp - 2 junctions(essentially 2 diodes back to back): emitter based and collector based junctions three modes: cutoff,saturated,active determined by ebj and cbj EBJ CBJ MODE fwd rev active fwd fwd saturated rev rev cutoff rev fwd reverse-active (rarely used) thinner base region makes for a faster transistor Ic is independent of Vcb (voltage across CBJ) Ie = Is*e^(Vbe/Vt) = Ic*(beta+1)/beta Is = saturation current Vt = thermal voltage = 25mV@room temp Ic = (beta)*Ib (alpha) = (beta)/(beta+1) = quality measurement of transistor = comman base current gain (beta) = common collector voltage gain 6/14/07: in active mode, a transistor acts like a VCCS w/ magnitude controlled by Vbe typical transistor modes wrt EBJ/CBJ active - fwd/rev cut off - rev/rev saturated - fwd/fwd type e b c mode PNP 5.7 5 3 active NPN 5.7 5 7 cut off NPN -0.7 gnd 4 active PNP 3.3 4 3 cut off NPN 4.3 5 4 saturated 6/19/07: more transistors equation can only be written through the emitter/base junction to solve Ie = Ib + Ic transistors as amps: field effect transistors do not have a dc offset class A amp has q point in middle, class B has q point at Vcc and uses 2 transistors 6/21/07: I seem to have lost a day here for one reason or another 6/26/07: emitter resistance can be represented at the input in series with Vpi by Rb = (beta+1)Re use these to check for linearity and max inputs: Vsigmax = (Vc - Vb)/gain for saturation (min output) Vsigmax = (Vcc - Vc)/gain for cutoff (max output) Vsig = Vpi*(Rin+Rsig)/Rin 6/28/07: bandwidth = Fh - Fl ~~ Fh (in some cases) GB = median decibel gain * BW 7/03/07: Transistor as a switch: